A component interface circuit may communicate via a logical connection, referred to as an interconnect or a link, which may provide a point-to-point communication channel between two ports, thereby allowing both ports to send and/or receive requests (such as configuration read/write, I/O read/write, memory read/write, among other requests). For instance, in a system that uses a peripheral component interconnect express (PCIe) bus, in order for a PCIe peripheral memory device to be addressable, the peripheral memory device may first be mapped into an I/O port address space or a memory-mapped address space of the system. The system's firmware, device drivers, and/or operating system may program the mapping of the peripheral memory device to a base address register to inform the peripheral memory device of its address mapping by writing configuration commands to a PCIe controller.